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1. vllm-project/vllm vllm-project/vllm Public

   A high-throughput and memory-efficient inference and serving engine for LLMs

   Python 91.9k 22.3k

2. openhwfoundation/cva6 openhwfoundation/cva6 Public

   The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

   Assembly 3.1k 1k

3. pulp-platform/riscv-dbg pulp-platform/riscv-dbg Public

   RISC-V Debug Support for our PULP RISC-V Cores

   SystemVerilog 328 102

4. riscv-ooo-core riscv-ooo-core Public

   Full superscalar RV32I out-of-order processor with Tomasulos Algorithm, 7-stage pipeline, and UVM testbench. 1st Place + Special Jury Award — SanDisk Hardware Hackathon.

   Verilog 13